1. Field of the Invention
The field of the present invention relates to a nonvolatile semiconductor memory device and a manufacturing method therefor, and more particularly to an electrically programmable nonvolatile metal-oxide-semiconductor (MOS) memory device having an asymmetric source and drain and a manufacturing method therefor.
2. Description of Related Art
Flash memories are a growing class of nonvolatile storage integrated circuits. Flash memories have the capability of electrically erasing, programming, and reading a memory cell in the chip. A flash memory cell is formed using so-called floating gate transistors in which the data is stored in a cell by charging or discharging the floating gate. The floating gates are a conductive material, typically polysilicon, which is insulated from the channel of the transistor by a thin layer of oxide, or other insulating material. The floating gates are also insulated from the control-gate/word-line of the transistor by a second layer of insulating material.
Data is stored in the memory cell by charging or discharging the floating gate. The floating gate is discharged by tunneling of electrons through a thin dielectric separating the floating gate from the substrate. Fowler-Nordheim (FN) tunneling of electrons occurs when a large potential difference is established between the floating gate and either the source or drain. The resultant high electric field imparts sufficient potential energy to electrons to allow them to surmount the energy barrier presented by the thin dielectric and to tunnel through the dielectric. The direction of tunneling is determined by the polarity of the potential difference. While the only mechanism for removing electrons from the floating gate is by FN tunneling, there are several mechanisms for placing electrons on the floating gate. One is FN tunneling and the other is injection. Injection is typically a faster programming mechanism than FN tunneling. Injection relies on an electric field of lesser magnitude than that required for FN tunneling but requires some mechanism for imparting additional kinetic energy to electrons, which when coupled with the potential energy, is sufficient to allow electrons to surmount the energy barrier created by the thin dielectric. Typically, a large cross-channel current is required and a small fraction of the electrons become sufficiently energized by carrier-to-carrier collisions to inject through the dielectric.
When the floating gate is charged, the threshold voltage for causing the memory cell channel to conduct is increased above the voltage applied to the word-line during a read operation. Thus, when a charged cell is addressed during a read operation, the cell does not conduct. The non-conducting state of the cell can be interpreted as a binary 1 or 0 depending on the polarity of the sensing circuitry.
A trend in the industry to improve the packing density of a memory array, is to utilize a virtual ground architecture. In a virtual ground architecture, the transistors of adjacent memory cell columns share a bit-line between the source and the drain of the transistors in adjacent columns. The need for a dedicated pair of bit-lines per column is eliminated. Any memory cell in the array can be programmed, or read by the application of appropriate voltages to the word-line and the bit-lines connected to it. In particular, the state of an addressed memory cell can be determined by sensing the current flowing through its source and drain by means of the bit-lines connected thereto.
A drawback to buried bit-line virtual ground architecture in flash memory is the problem of an undesired disturb/program of an adjacent cell which shares a bit-line and a word-line with a cell being programmed or read. During erasing of a cell, the adjacent cell may be susceptible to FN tunneling. This results in an unacceptable memory loss, often referred to as a "memory disturb," which will affect the readout characteristic of the cell.
A drawback to the use of the injection mechanism for programming a cell is that large amounts of power are required. Typically, only a fraction of a percent of the charge carriers crossing the channel obtain sufficient energy to be injected into the floating gate. The rest are wasted. Injection mechanisms are therefore difficult to implement in memory arrays which have low power specifications.
The major challenges to the effective implementation of flash memory design are memory disturb, programming speed, and power consumption. In order to realize further reductions in array size, what is needed is a solution to the disturb problem in virtual ground architectures. In order to realize further reductions in power consumption, what is also needed is a solution to the inefficiency of programming by electron injection.